Chainsaw: Von-neumann accelerators to leverage fused instruction chains.
Amirali Sharifian, Snehasish Kumar, Apala Guha, Arrvindh Shriraman: Chainsaw: Von-neumann accelerators to leverage fused instruction chains. MICRO 2016: 49:1-49:14
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Peruse and Profit: Estimating the Accelerability of Loops.
Snehasish Kumar, Vijayalakshmi Srinivasan, Amirali Sharifian, Nick Sumner, Arrvindh Shriraman: Peruse and Profit: Estimating the Accelerability of Loops. ICS 2016: 21:1-21:13
View ArticleTAPAS: Generating Parallel Accelerators from Parallel Programs.
Steve Margerm, Amirali Sharifian, Apala Guha, Arrvindh Shriraman, Gilles Pokam: TAPAS: Generating Parallel Accelerators from Parallel Programs. MICRO 2018: 245-257
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μIR -An intermediate representation for transforming and optimizing the...
Amirali Sharifian, Reza Hojabr, Navid Rahimi, Sihao Liu, Apala Guha, Tony Nowatzki, Arrvindh Shriraman: μIR -An intermediate representation for transforming and optimizing the microarchitecture of...
View ArticleSPAGHETTI: Streaming Accelerators for Highly Sparse GEMM on FPGAs.
Reza Hojabr, Ali Sedaghati, Amirali Sharifian, Ahmad Khonsari, Arrvindh Shriraman: SPAGHETTI: Streaming Accelerators for Highly Sparse GEMM on FPGAs. HPCA 2021: 84-96
View Articlemu-grind: A Framework for Dynamically Instrumenting HLS-Generated RTL.
Parmida Vahdatniya, Amirali Sharifian, Reza Hojabr, Arrvindh Shriraman: mu-grind: A Framework for Dynamically Instrumenting HLS-Generated RTL. PACT 2022: 346-358
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